PC Selection of Binary Pseudo-Random Sequence m for SAW Tapped Delay Line
微机选择用于声表面波 抽头延迟 线的二元伪随机码m序列
At the time it reported entering into a new $ 3bn revolving credit facility although it had not yet tapped the funding line .
当时,该公司报告达成一项新的30亿美元的循环信贷安排,尽管它尚未 利用这一资金 来源。
This paper reports a 31 bit low frequency SAW programmable tapped delay line . It is a key device in signal processing of interference free spread spectrum communication system .
文章报道的31位声表面波低频可程序 抽头延迟 线是一种用于扩频抗干扰通信系统所用的关键信号处理器件。
The tapped line I / O block and the internal coupling structure is systematically analyzed . Two methods of analysis and design programs of filters are given .
对 抽头 线单元和内部耦合结构进行了详细研究,给出了等效电路和参数提取两种分析方法,并编写了相应的设计程序。
For feedforword lattic using the new type strcture the function of ordinary tapped delay line with 2 ~ N taps can be realized only need N + 1 taps .
以前馈阵列为例,采用该结构仅用n+1个抽头实现了2~N个抽头的常规 抽头延迟 线功能,具有重要的实用价值和应用前景。
The purpose of this paper gives the deeper research of tapped line microwave filters to provide the fast and precise design for the kinds of filters .
本文主要工作是深入研究 抽头 式结构微波滤波器,以实现对这类滤波器的高效快速设计。
Through the practical measurements of two types of fixed delay line and a tapped delay line some procedures for increasing measurement precisiOn are obtained .
对两种固定延迟 线及 轴头延迟进行了具体测试,总结出了一些提高测试精度的方法。
This is the first report about general developing aspect of SAW programmable tapped delay line ( SAW-PTDL ) in our institute .
报道声表面波可程序 抽头延迟 线的研制情况。
The wideband MIMO channel can be modeled as a tapped delay line and an exponential multipath intensity profile ( MIP ) is assumed .
假定宽带MIMO信道可用 抽头延迟 线来模拟并具有指数型多径强度轮廓。
MWPC with tapped delay line readout from the cathode wires
抽头延迟 线读出的多丝正比室
A Versatile Tapped Analog Delay Line
一种灵活多 用 的 抽头模拟延迟 线
Tapped delay line filter based on real genetic algorithm and its application in adaptive inverse control
基于实型遗传算法的 抽头延迟 线滤波器及其在自适应逆控制中的应用
32 MSK SAW Tapped Delay Line
声表面波32位MSK 抽头延迟 线
Generalizes the Filter design method with SIR structure adopting λ _g / 4 model and presents a Coaxial SIR Filter with Tapped Line .
3总结了采用λg/4型SIR结构的滤波器的设计方法,并提出一种带 抽头的同轴SIR带通滤波器。
This paper firstly presents such programmable delay line and multi tapped delay line banks used in PD radar which is believed to have large application potential .
文章介绍了研制的 声 表面波可编程延迟线和多 抽头延迟 线 组件,首次用于PD雷达 欺骗干扰,应用前景良好。
The tapped delay line method and the implementation of this method in FPGA are presented .
文章首先介绍了 主流 的 几种时间间隔测量方法,特别是设计采用的 抽头延迟 线法,并且简要分析了这种方法在FPGA内部的实现途径。
Plant and inverse controller are expressed by a tapped delay line filter respectively .
对象和逆控制器各用一个 抽头延迟 线滤波器表示, 用 抖动方法 给 对象 建模;
交线分接头线