High level transistor transistor logic

高级晶体管 晶体管 逻辑 电路

Transistor logic circuit families

晶体管 逻辑电路系列

Low-Power Non-full Swing Complementary Pass - Transistor Logic Adder

低功耗非全摆幅互补传输 管 加法器

The basic DRAM cell is comprised of a transistor and a capacitor . The digit that is saved in the storage cell is determined as logic 1 or 0 by the voltage potential stored inside the capacitor .

DRAM存储单元由一对 MOS 管-电容对组成，电容的电位决定了存储单元的 逻辑是1还是0。

Transistor transistor logic / advanced schottky

改进型肖特基晶体管 晶体管 逻辑

Emitter follower diode transistor logic

射极跟随器二极管 - 晶体管 逻辑

Diode transistor logic gate

二极管 晶体管 逻辑门

Design and Simulation of a Reconfigurable Single-Electron Transistor Logic Gates

可重构单电子 晶体管 逻辑的设计与模拟

Static and Dynamic Performance of Micropower Transistor Logic Circuits

微功率 晶体管 逻辑电路的静态性能和动态性能

Radiation resistant diode transistor logic

耐辐射二极管 晶体管 逻辑

Based on the I-U characteristics of single-electron transistor ( SET ) and the concepts of CMOS digital circuits design a sort of logic gate is proposed .

基于单电子 晶体管（SET）的I＿U特性和CMOS数字电路设计思想，提出了一类互补型SET 逻辑门。

Emitter coupled transistor logic circuit

发射极耦合 晶体管 逻辑电路

The base circuit cell of the de - cision circuit is source - coupled field-effect transistor logic ( SCFL ) circuit .

判决电路的基本单元为源耦合场效应 晶体管 逻辑（SCFL）电路，时钟提取电路由预处理器和锁相环构成。

Load-compensated diode transistor logic Selection of Bellows-type Expansion Joint and Bellows Adjustment Device

负载补偿式二极管& 晶体管 逻辑波纹管补偿器与波纹管调长器的选用

Traditional logic gate is composed of transistors with transistor size will reach the limit the bottleneck of the development of the traditional logic gates is coming soon .

传统逻辑门由晶体管构成，随着 晶体管尺寸缩小即将达到极限，传统 逻辑门面临的发展瓶颈。

Three transistor dynamic cells and buffered I / O control logic are used for the device . The control circuit is optimized for Y C separation system .

电路采用了三 管动态存储单元和带缓冲的I／O单元，并针对Y－C分离算法的要求对控制电路进行优化。

The design of quaternary edge triggered JK type flip flop is proposed . The computer simulation and the test on experimental circuit composed of transistor transistor logic ( TTL ) gates show that the flip flop has the predetermined logic function .

提出一种具有四轨输出的四值维持阻塞JK触发器的电路设计，经计算机模拟和测试由 TTL门电路组成的实验电路表明，该触发器能实现预定的功能。

In the brushless model the IGBT ( Isolated Gate Bipolar Transistor ) switch state period table is gained by GAL ( Generic Array Logic ) which analyzes the signal of position feed-back .

在无刷直流方式下，用 GAL对位置反馈信号进行 逻辑综合，得到开关管的导通规律。

Resistor transistor logic they keep a path clear to the chimneys .

电阻 - 晶体管 逻辑 电路通往烟囱的路畅通无阻。

A Modified Schottky Transistor Logic Circuit with High Speed and Micropower Consumption

高速微功耗改进型肖特基 晶体管 逻辑

When setting the transistor dimension in the decoder circuit the thesis uses the logic effort analytical method to determine the fan-out of the logic gates and acquire the optimal delay of the logic chains .

在对译码电路中 晶体管进行尺寸设定时，采用 逻辑努力分析方法，确定在65nm工艺下获得最优延时的逻辑门的扇出值。

Microwave mixing crystal diode hybrid diode transistor logic

微波混频晶体二极管混合二极管 晶体管 逻辑

In chapter 4 the circuit of the carrier synchronization unit is implemented on FPGA the Resistor Transistor Logic ( RTL ) schemes are presented .

第四章在FPGA平台上实现载波同步单元电路，并给出了实现后的FPGA资源消耗、寄存器传输 逻辑（ RTL） 原理图。