test pattern

[test ˈpætən][test ˈpætən]

n.(电视信号)测试图

  • The stuck - open faults are simulated concurrently based on IDDT testing with the test pattern pairs generated above .

    利用 测试生成的 向量对,采用瞬态电流测试方法对开路故障进行并发故障模拟。

  • This paper presents a test pattern generation system implemented on a CAD workstation .

    本文介绍了一个在康发工作站实现的 测试产生系统 COMPA-ATPGS

  • With the concept of state equivalence the search space of test pattern has got smaller .

    通过引入状态等价的概念,缩小了 测试 搜索空间。

  • An auto-generating approach to the universal test pattern for FPGA logic resources is suggested .

    提出一种通用FPGA逻辑资源 测试 图形自动生成方法。

  • The essay introduce driving license training test pattern discuss the feasibility of this pattern meanwhile produce the way that this pattern is implemented concretely .

    文章介绍了驾照的培训、 考试 模式,探讨了这种模式在大学英语教学评估中的可借鉴性和可行性。

  • Figure 3 : The simple white-on-black test pattern used to determine some of the effects of aperture shape on the out-of-focus images .

    图三:一些简单的黑白的 测试 图样,用于判定光圈形状对失焦图像的影响。

  • Exploration and Practice on Test Pattern Reform of Mechanical Drawing

    机械制图 考试 模式的改革探索与实践

  • Comparing Automatic Test Pattern Generation System

    数字电路 测试 向量自动生成系统的比较

  • First establish test pattern between among checkpoints with BP neural network technique .

    首先,利用BP神经网络建立了点与点之间的 测试 模型

  • When you choose to align the cartridge your printer will automatically print an Alignment Test Pattern . Use this Pattern

    选择对齐墨盒时,打印机会自动打印对齐 测试 图案。用这个图案来

  • The Design and Implementation and Research of HDTV Monitor Test Pattern Generator

    高清数字电视机 测试 生成器的设计实现和研究

  • Television test pattern generator

    电视 测试 图案信号发生器

  • This paper summarizes some new developments in the area of test pattern generation during the past years .

    本文综述近几年来国际上在 测试产生 方法的研究方面的新进展。

  • This paper also deeply researched the algorithm to generate the test pattern for these architectures .

    本文也对这些结构的 测试 矢量的生成算法进行了深入讨论。

  • Based on cell fault model the paper studies test pattern generation and self test of tree adder which is frequently used in the high performance processors .

    时延故障对高速运算电路性能有着关键性的影响,本文对其中之一的并行前置树 加法器的通路时延故障 测试作了研究。

  • If you 're writing a transport layer then this is a very relevant test pattern .

    如果你正在写的传输层,那么这是一个非常相关的 测试 模式

  • Many scholars and teachers have been questioning this rigid test pattern .

    很多专家老师都对这种僵硬的 测试 模式提出了质疑。

  • This method solves the problem of generating CPU test pattern and other complex digital integrated circuit test pattern .

    通过 验证,该方法可极大地提高CPU 测试 图形的生成效率,彻底解决了长期以来CPU及其他复杂数字集成电路的测试图形生成的难题。

  • The thesis then introduces top-to-bottom schemes which discuss the functional design of HDTV test pattern signal generator according to the tasks and platform of the system and develops the function of subsystems .

    之后,论文采用了一种自顶向下的分步设计方法,针对系统任务及设计平台,对HDTV 测试 图案信号发生系统的功能,方案设计进行了讨论,并对各子系统功能进行了阐述。

  • The concept of inverse Boolean difference is introduced . Its calculation properties and method and test pattern generating functions based on it are given .

    引入了布尔反差分的概念,给出了相关计算性质和方法、基于布尔反差分的 测试 矢量生成方程。

  • This paper mainly describes a HDTV test pattern generator based on SOC .

    主要描述了基于SOC的高清晰度数字电视 测试 图像发生器的研究与实现。

  • Therefore the study of multi-core chip low-power BIST test pattern generation and application is of great significance .

    因此研究多核芯片BIST低功耗 测试 模式生成和应用,具有十分重要的意义。

  • The thesis researchs the basic theory of digital HDTV test pattern signal generating system and its realization based on SOC ( System On Chip ) .

    论文研究了数字高清晰度电视 测试 图案信号发生系统基本原理及其基于片上系统(SOC,Systemonchip)的具体实现。

  • Speedup Generation Method for Test Pattern Based on BDD Learning

    用二叉决策图学习加速 测试 模式生成

  • A new automatic test pattern generation ( ATPG ) methodology based on chaotic neural network method is described .

    阐述了一种基于混沌神经网络的自动 测试生成( ATPG)算法。

  • Test pattern generation program

    测试 模式生成程序

  • The test pattern generation algorithms for combinational logic circuit and the fault types were discussed .

    讨论了组合逻辑电路的故障诊断的方法, 故障 类型

  • Investigates the implementation scheme of cellular automata ( CA ) for application in the pseudo-random test of very large scale integration ( VLSI ) as a test pattern generator .

    研究细胞自动机(CA)在超大规模集成电路(VLSI)伪随机测试中作为 测试激励的 结构和实现方法。