synchronous logic

[ˈsɪŋkrənəs ˈlɑdʒɪk][ˈsɪŋkrənəs ˈlɔdʒik]

[计] 同步逻辑

  • Parallel Description and Implicit for Synchronous Logic

    时序 逻辑的并行描述与隐含遍历

  • This Action Node only has an outbound service node with a synchronous call but it does not have logic or a code fragment .

    该ActionNode只有一个出站服务节点和 同步调用,但它没有内部 逻辑和代码。

  • Fault monitoring of the rotating diodes in brushless synchronous excitation machines with rotating-diode phase compound excitation Retrofit of Detection of Non-conduction Output Logic for the Exciter Diode

    相复励旋硅式无刷 同步励磁电机旋转二极管的故障监测励磁机旋转二极管故障检测装置输出 逻辑的改进

  • Assignment Technique by Incorporating Redundant State into State Assignment A STUDY ON DESIGNING OF SYNCHRONOUS SEQUENTIAL LOGIC CIRCUITS

    同步时序 逻辑电路设计中冗余态参与状态分配 同步 时序 逻辑电路设计方法的研究

  • The multiple fault testing of synchronous sequential circuit with the dynamic Boolean equation method which reduces the Exclusive-OR operation to the logic addition one is proposed .

    本文提出了 同步时序线路多故障测试动态布尔方程方法,它将同步时序线路中的异或运算归结为 逻辑加运算,可一次求出被测线上双固定型故障s-a-1和s-a-0的全部测试集。

  • Modular logic design of multiple-valued synchronous sequential machines based on continuous logic

    基于连续 逻辑的多值 同步时序电路模块设计

  • A New Method for Unitized Analysis of Synchronous and Asynchronous Sequential Logic Circuits

    同步和异步时序 逻辑电路统一分析的新方法

  • And it is fit for all synchronous sequential logic circuits design .

    提出了一种 同步时序 逻辑电路设计的新方法&次态方程联立法。

  • This cymometer is designed by the complete synchronous digital frequency measurement method based on the programmable logic devices FPGA .

    本频率计采用的是全 同步数字测频法并在FPGA可编程 逻辑器件上进行设计实现。

  • The experiment controls the four synchronous motor control with PLC fast logic task PLC slow logic task and configuration control task to inspect CASS-RTOS functions of achievement .

    实验利用PLC的快速 逻辑任务和慢速逻辑任务,以及组态控制任务对四路 同步电机进行控制,考察CASS-RTOS的功能实现情况。

  • The software is capable of simulating circuits combined with combinational circuits synchronous and asynchronous sequential logic circuits and some programmable logic devices .

    该软件能够模拟组合逻辑电路、 同步和异步时序 逻辑电路及部分GAL等可编程逻辑元件组成的电路。

  • Application of SPIN in Synchronous Sequential Logic Circuits

    SPIN在 同步时序 逻辑中的应用

  • Fault alarms collection mainly use the JMS technology which supports the synchronous message-driven and it can be separation with other monitoring modules by the message middleware in logic .

    故障告警收集主要采用了JMS技术,它支持 异步消息驱动,通过以消息中间件的形式将故障告警信息的收集与其他监控模块进行 逻辑上的分离。

  • A study on designing of synchronous sequential logic circuits

    同步时序 逻辑电路设计方法的研究

  • This article puts forward a new method that is able to operate on the action diagram to achieve the combination of states on the state transitional diagram for the design of synchronous sequential logic network having not too great number of state and input variables .

    对于状态数和输入变量数都不太大的 同步时序 逻辑网络的设计问题,本文提出可在状态转移图上进行图上作业来实现状态合并。

  • A solution of a synchronous logic of 4 gray scale LCD controller is presented which disables invalid operations to reduce power dissipation by asynchronous control . The results of the simulations show that the power dissipation on average is reduced to 23.7 % compared with synchronous logic ;

    文章提出了4级灰度LCD控制器 异步 电路的设计方案,通过异步控制以消除无效操作从而降低功耗,经验证平均功耗仅为同步电路的23.7%;

  • It is seen that to realize synchronous sequential logic circuits with the flip-flops is effective and convenient .

    可以看出,用这种触发器实现 同步时序 逻辑电路是有效且方便的。

  • The fault diagnosis system includes four parts : sampling and insulation of the synchronous signal sampling of the voltage waveform of the rectifier logic pre-processing and DFT analysis display and alarm circuit .

    故障诊断系统主要包括 同步信号的取样与隔离、整流电压的采样、 逻辑预处理及DFT分析,诊断显示报警电路等四部分。

  • In the design process according to features of synchronous communication and asynchronous communication rationally reuse common function logic between the both the area and the power of SASI has been greatly reduced .

    设计过程中,结合 同步通信和异步通信的特点,合理的复用了两者的共同功能 逻辑,使得同/异步串口的面积和功耗大大减少。

  • Opposite in single game refers to more technique problems for example the server swarm structure the network first floor communication model the synchronous strategy of the game logic . The synchronous strategy of game played an important role in the network game .

    相对于单机游戏,网络游戏涉及到更多的技术问题,比如网络底层通讯模型,游戏 逻辑 同步策略、服务器群集技术等,其中游戏同步机制在网络游戏中有着至关重要的作用。

  • Application of Multi-Point Synchronous Explosive Logic Circuit of the Ring Propagating Charge

    环形传爆药多点 同步 起爆网络的应用研究

  • Then the method of using GAL to design the eight bit binary reversible synchronous counter and a kind of logic design software & CUPL language are also introduced .

    同时介绍一种通用 逻辑设计软件&CUPL语言.文中着重介绍了八位二进制可逆 同步计数器的功能特点及其用GAL设计的方法。

  • Simple Method to Design A synchronous Sequential Logic Circuit

    异步时序 逻辑电路设计的一种简明方法

  • A Period-analyzing Approach to Synchronous Sequence Logic Circuits of Signal Processing Based on Frames

    帧信号处理系统 逻辑设计的周期分析方法

  • This paper provides a general analyzing approach which has the features of criterion simplicity efficiency and reliability to the familiar synchronous sequence logic circuits of signal processing based on frames and then a typical example is analyzed in detail .

    针对常见的基于帧的信号处理系统中的 同步 控制系统设计提出了一种规范、简单、高效、可靠的通用分析方法,并且结合一个具有代表性的例子作了较为详尽的分析。

  • In this case the worker process uses synchronous pipes because this would preserve the sequence of the request-processing logic .

    这种情况下工作进程使用 同步管道,因为需要保持请求处理 逻辑顺序。

  • The paper designed and realized multiloop synchronous phase-shifted PWM control signals by using VHDL language for Complex Programmable Logic Device ( CPLD ) according to the characteristic of polyphase converters .

    针对多相变流器的控制特点,采用VHDL语言描述,应用复杂可编程 逻辑器件CPLD设计实现了多相变流器所需的多路 同步移相PWM控制信号。

  • Based on error analysis of traditional auto digital phase measurement multi-cycle synchronous digital phase measurement is proposed with error analysis and completed with a complex programmable logic device ( CPLD ) .

    在对传统自动数字测相法的误差进行分析的基础上采用了多周期 同步数字测相方法,对其误差进行了分析,并采用可编程 逻辑器件(CPLD)加以实现。