Design Practice of Timing Signal Generator Based on PC Parallel Port

基于PC并口的 定时信号 发生器的设计实践

Timing generator of a high speed CCD camera using FPGA

采用FPGA的高速CCD相机的 时钟 发生器

Design of the Display Timing Generator in the LCD Scaler

LCD定标器中显示 时序 控制模块的设计

The CCD Timing Generator 's architecture and its working process were analyzed .

讨论了CCD 时序 发生器的组成原理及其工作过程。

Apart from the above two modules Scaler chip also includes some auxiliary parts such as the Display Timing Generator module and the microprocessor I / O module .

这种结构可以简化寻址数据部分的复杂度，节省电路面积。除上述两个模块，定标器芯片中还包括输入模块、显示 时序 控制模块、微处理器接口模块等辅助模块。

A new type of timing pulse generator is designed and simulated using WINS software .

设计了一种新的 产生 RSFQ 时钟信号的 电路，并利用WINS软件对 电路进行了模拟。

The interface relation between the CCD Timing Generator and CCD controller was also discussed .

给出了它与 CCD 控制器的接口关系：由CCD控制器给出的 指令和数据予以控制。

Design of CCD Timing Signal Generator

CCD 时序信号 发生器的设计

Timing generator of aerospace liner CCD camera and its implementation based on ISP technology

线阵CCD相机 时序 发生器及其基于ISP技术的实现

Briefly presented the Timing Generator 's functions : it generates various kinds of impulse sequence for the focal plane unit and vision processor and acts as the synchronous coordinator for time in the CCD imaging unit .

简述了线阵CCD相机中CCD成象单元的 时序 发生器的功能：产生焦平面组件和视频处理器所需的各种脉冲序列，在CCD成象单元工作中起着时间上同步协调的作用。

LCD controller mainly consists of three modules of host interface display ram master and LCD timing generator .

控制器主要由三个模块组成：处理器接口模块、显存控制模块和LCD 时序 控制模块。

Singlechip frequency conversion timing PWM wave generator

单片机变频 调速PWM波 发生器

A concurrent fault simulator is used to simulate test vectors both on logic and timing in ATPG . The test vector generator uses the simulating information avoiding generating invalid vectors .

使用并发故障模拟器从逻辑上和 时序上对生成的测试矢量进行仿真，测试矢量 生成器使用该仿真信息，以避免生成失效测试矢量。

Effectively combining the model of generator turbine and timing implement together the electromagnetism transient model which can simulate generator throwing off load is introduced .

将发电机、水轮机、 调速器及励磁系统模型有效结合导出了可仿真 发电机甩负荷的电磁暂态模型。

A timing adjusted ramp generator

一个 定时校准的斜坡 发生器

In the digital part the system timing has been carefully arranged by designing the clock generator . And the rational system timing guarantees the reliability of the system .

在设计数字部分 时，通过仔细设计时钟 电路 产生合理的系统 时序，保证了系统的可靠性。

An integrative design of multi-channel CCD timing generator and data cache

CCD 时序 电路与数据缓存器的一体化设计

The main structure of the hardware including top timing control unit bram and its timing generator serial to parallel converter shift register multiplexer processing element and multi-level adders .

硬件结构主要包括总体时序控制单元、存储单元及其 时序 发生器、串并转换单元、移位器、选通器、运算单元和级联加法器。

The improved timing and intermittent NaCLO_2 generator the bridge rectification cabinet of the NaCLO_2 generator and the feeding of NaCLO_2 by capsule pressure-difference pot were illustrated in the paper .

本文对研究改进后的 定 时间歇运行次氯酸钠 发生器、次氯酸钠发生器分开式电器柜桥式整流及胶囊式压差罐投加次氯酸钠消毒液进行了阐述。

The design of Timing Generator of Scientific Grade CCD Camera Based on FPGA SCIENCE

基于FPGA的科学级CCD相机 时序 发生器的设计