DC gain is 80 dB unity gain bandwidth is 100 KHz and the phase margin is 90 ° . Floating gate current source is introduced to make the circuit more compact . The area of this design is less than 600 100 square microns .

直流增益大于80dB， 单位 增益 带宽 积为100K，相位裕度为90°。浮栅电流源的引入使得本文设计的电路结构更紧凑，面积小于600100平方微米。

The paper designs a cmos fully-differential operational amplifier of high-speed and high-resolving ADC with gain-boosted telescopic cascode to get high unity gain bandwidth .

设计了用于高速高分辨率ADC的CMOS全差分运算放大器，采用套筒式级联增益自举电路，达到高 增益 带宽且低功耗。

Based on the frequency-domain analysis of conventional single-loop LDO a dual-loop LDO regulator structure with fast transient response is proposed which improves dc open-loop gain while maintaining the unity gain bandwidth thus increasing the transient response of LDO regulator .

通过对传统单环LDO的频域分析，提出一种快速瞬态响应的双环路LDO稳压器结构，在保证 单位 增益 带宽不变的前提下提高直流增益，进而提高LDO电路的瞬态性能。

The in-phase integrator and reverse-phase integrator which are both not sensitive to parasitic capacitor are chosen in the filter design . The CMOS two-stage operational amplifier which has the high DC gain and unity gain bandwidth is used to form the integrator .

设计中采用了对寄生电容不敏感的反相积分器和同相积分器，积分器中的运算放大器选择具有较高直流开环增益和较大 单位 增益 带宽的CMOS两级运放。