A new universal logic gate ( ULG3 ) based on OR-Coincidence canonic expansion

一种基于或-符合展开的新颖 通用 逻辑 门

The discussion on testing shows that OR-Coincidence type universal logic gates have strong logic functions and can be used to simplify networks structure so the chances for faults to occur and test load are reduced . Using this kind of gate in digital design is beneficial to testing .

对故障测试的讨论表明，或-符合型 通用 逻辑 门逻辑功能强，可以简化网络结构，从而减少故障的发生和测试负荷，在数字设计中使用对故障测试较为有利。

This paper discusses the classification of logical functions and proposes a tabular method to realize an arbitrary three-variable function by using NP type three-variable universal logic gate f4 and gives out several design examples .

本文讨论了逻辑函数的分类，提出了使用NP型三变量 通用 逻辑 门f4实现任意三变量函数的查表方法，并给出了设计实例。

In this paper a very-high speed BCL universal logic gate ( ECL-ULG ) with simple structure and powerful function is presented which can be applied as a basic cell of ECL-LSI gate arrays .

本文提出用ECL 通用 逻辑 门（ECL-ULG）作ECL-LSI门阵列的基本单元。ECL-ULG结构简单、逻辑灵活、连线少和速度快。

Research of the CMOS Circuits for Optimal Universal - Logic - Gate

最佳 通用 逻辑 门的CMOS电路研究